The device is a compound Si-PIN structure. To reach high response, back side hole etching process is used for thinner I layer, when carrier go through the floating area, optical current will appear .Slow optical carrieIP are shorted for fast response purpose.We has our Patented package Desgin-“Bullet” design adopts Two optimized chips special for different wavelength.
Tsub=25°C, CW bias unless stated otherwise
Circle chip
Parameters | Sym. | Test conditions | Min | Typ | Max | Unit |
Response Spectrum | λ | - | 400~1100 | nm |
Circle Active diameter | φ | - | 0.2 | 0.5 | 1.0 | 2.0 | 4.0 | mm |
Reponsivity | Re | λ=1060nm,VR=40V | 0.2 | 0.2 | 0.2 | 0.23 | 0.23 | A/W |
Response time | Tr | RL=50Ω,VR=40V, | 2.0 | 5.0 | 6.0 | 8.0 | 12.0 | ns |
Reverse breakdown voltage | VBR | I R =10µA | 80 | 100 | 80 | 100 | 100 | V |
Dark current | ID | V R =40V | 1 | 5 | 8 | 10 | 40 | nA |
Capacitance | C | F=1MHZ,V R =40V | 0.5 | 0.8 | 2.0 | 5.0 | 12 | PF |
Operating Voltage | VR | - | 40 | V |
Note: Saturated optic power ≤0.3w/cm2
Square chip
Parameters | Sym. | Test conditions | Min | Typ | Max | Unit |
Response Spectrum | λ | - | 400~1100 | nm |
Circle Active diameter | φ | - | 1x1 | 4x4 | 1.3x1.3 | 2x2 | 3x3 | mm |
Reponsivity | Re | λ=635nm,VR=10V | 0.38 | A/W |
Response time | Tr | RL=50Ω,VR=10V, | 25 | 100 | 45 | 50 | 50 | ns |
Reverse breakdown voltage | VBR | I R =10µA | 50 | V |
Dark current | ID | V R =10V | 3 | 15 | 3 | 5 | 7 | nA |
Capacitance | C | F=1MHZ,V R =10V | 15 | 350 | 50 | 300 | 500 | PF |
Operating Voltage | VR | - | 10 | V |
Note: Saturated optic power ≤0.3w/cm2
Typical characteristical curve
Responsivity, R (A/W)
Circle chip Wavelength, λ (nm)
Responsivity, R (A/W)
Square chip Wavelength, λ (nm)
Capacitance vs voltage Curve
capacitance
Voltage（V）
Application electric circuit
